High speed Imaging

Fast phenomena can only be studied, when recorded at high frame rate. This requires special architectures with low noise read-out chains to compensate for low light levels.

  • High sensitivity: ≥ 100 µV/e– and low noise operation: ≤ 2 e–rms
  • Technology Global Shutter (6T pixel) operation
  • Multi-row access to reduce row overhead time
  • Block or segment wise read-out to achieve faster frame rates
  • Colour Filter Array (CFA) and Micro lens technologies are available

Sorting & hyperspectral imaging

Colour fidelity is the keyword for sorting applications. Whether a linear or area detector is used; the colour signal shall remain unchanged over the full array.

  • Low etaloning with optimised technologies
  • Custom designed pixel architecture and technology
  • Flexible timing (shutter modes & integration control)
  • Fast frame rates for hyperspectral imaging

Quality Inspection

Vision is the ideal non-contact technique for quality inspection. Global shutter, high speed and high dynamic range are important to cope with fast throughput and low light environment.

  • Low light level operation: Gain ≥ 100 µV/e–
  • In-pixel anti-blooming
  • Technology Global Shutter (5T and 6T pixel) to avoid jello and skewness
  • Low noise operation: ≤ 2 e–rms

Food Safety

Stimulated light processes, like fluorescence and Raman, are becoming available as in line inspection tools. They require image sensors with precise integration control and high gain, low-noise operation.

  • Short integration time to capture fluorescence peak
  • Accurate timing delay to discriminate fluorescence signals
  • Noise ≤ 0.3 e–rms (4T pixels and oversampling) for Raman detection
  • Low etaloning over the full array
  • Photon shot noise limited behavior when using SPAD’s

Caeleste has the short-term ambition to create CMOS imagers to match scientific CCDs in all respects:

  • backside illumination, stitching up to wafer scale
  • ILT-CCD like operation by the use of “global shutter” (GS) CMOS technology, at the same time allowing true, on-chip CDS
  • low dark current by pinned diodes, and buried memory nodes for global shutter operation

Where CMOS outperforms CCD:

  • CMOS type of interfaces, including on-chip AD conversion, extremely high data throughput, at the lowest possible power
  • linear, >100dB dynamic range by Caeleste’s exclusive HDR techniques (see patents page), compatible with CDS and GS
  • radiation tolerance, for TID, SEU, SET etc.

Caeleste is looking for talented engineers